Low dropout (LDO) voltage regulator (VR) is used to regulate a power supply to a load according to changes in load conditions. A typical LDO VR consists of a p-type transistor with a source terminal coupled to a node that provides an input power supply, a drain terminal coupled to the load to provide the regulated power supply, and a gate terminal controllable by a comparator or amplifier. Here, the comparator or amplifier compares the power supply provided to the load against a reference voltage, and generates a control signal to control the gate terminal of the p-type transistor.
However, during active operation of the load (e.g., high switching of nodes in the load), high frequency current spikes are observed on the power supply provided by the LDO VR. It is a challenge to regulate the power supply for these high frequency current spikes (e.g., current spikes at 1 GHz) as well as for low frequency switching noise (e.g., switching noise at 1 MHz) on the power supply using the typical LDO VR.